CPU Process Scheduler Simulator

Overview

Designed and developed a low-level C simulation platform that evaluates core operating system scheduling algorithms against real-time workloads. The architecture implements true multi-process IPC (inter-process communication) with shared memory and message queues to coordinate a central process generator, clock simulator, and CPU dispatcher.

Implemented Algorithms & Metrics

• Non-Preemptive Highest Priority First (HPF): Static priority queue scheduling with aging mechanisms to prevent process starvation.
• Shortest Remaining Time Next (SRTN): Dynamic preemption based on remaining burst durations.
• Round Robin (RR): Time-sliced quantum execution with context-switch tracking.
• Performance Metrics: Automated generation of statistical logs analyzing CPU Utilization, Average Turnaround Time, Average Waiting Time, and Weighted Turnaround.

Source Code & Verification